CMOS image sensor capable of increasing fill factor and...

Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit

Reexamination Certificate

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C250S2140RC

Reexamination Certificate

active

06762401

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a complementary metal-oxide-semiconductor (CMOS) image sensor; and more particularly, to a CMOS image sensor capable of increasing a fill factor and a driving method thereof.
DESCRIPTION OF RELATED ARTS
A complementary metal-oxide-semiconductor (CMOS) image sensor is a device that converts a photo image into an electric signal. The CMOS image sensor becomes reactive to light and converts signals of electrons into signals of voltages so as to get image information. The CMOS image sensor can be used in any device that displays image, e.g., cameras, medical equipments, surveillance cameras, industrial equipments for detecting and confirming location, toys and so forth. Currently, usages and applications of the CMOS image sensor become progressively broader.
FIG. 1
is a block diagram illustrating a conventional CMOS image sensor. The CMOS image sensor includes a control and system interface unit
100
, a pixel array
200
having a plurality of image sensing elements, and an analog-to-digital converter
300
. The analog-to-digital converter
300
includes a digital-analog converter
310
for generating a reference voltage and a comparator
320
for comparing the reference voltage with a analog image data from the pixel array
200
to generator a digital image data, and a buffer
400
for storing the digital image data.
The CMOS image sensor is provided with metal-oxide-semiconductor (MOS) transistors as the same number of pixels and employs a switching mode to detect outputs in an orderly manner by using the MOS transistors. The CMOS image sensor, compared to a most generally used conventional charge coupled device (CCD) image sensor, has a simple operational scheme and is capable of implementing various scanning types. A signal processing circuit for the CMOS image sensor can be integrated into a single chip so that it is possible to miniaturize products. Also, use of compatible CMOS technique provides advantages of reducing manufacturing costs, and providing a reduced power consumption.
FIG. 2A
is a circuit layout showing a unit pixel
21
of a CMOS image sensor constructed with four transistors and two capacitors, i.e., a photodiode and a floating diffusion region. The unit pixel
21
of the CMOS image sensor having an active pixel structure includes a photodiode PD, a floating diffusion region FD and four NMOS transistors.
The photodiode PD detects photon and generates charges. The floating diffusion region FD stores the charges transferred from the floating diffusion region FD. The four NMOS transistors are a transfer transistor TxTr, a reset transistor RxTr, a driver transistor DxTr and a select transistor SxTr. The transfer transistor TxTr transfers the charges generated and transferred from the photodiode PD to the floating diffusion region FD. The reset transistor RxTr releases the charges stored at the FD to detect signals. The driver transistor DxTr functions as a source follower. The select transistor RxTr is for switching and addressing.
Operational procedures of the unit pixel
21
in the CMOS image sensor are described in below. Firstly, the reset transistor RxTr, the transfer transistor TxTr, and the select transistor SxTr are turned on to reset the unit pixel
21
. At this time, the photodiode PD starts to be depleted. Also, the floating diffusion region FD is electrically discharged in proportion to a supplying voltage VDD.
Next, the transfer transistor TxTr is turned off and the select transistor RxTr is turned on. Then, the reset transistor RxTr is turned off. From this series of operation, charges are stored in the photodiode PD by light. Concurrently, voltage of the floating diffusion region FD is read from an output terminal Vout of the unit pixel and is stored in a buffer as a first output voltage “V
1
”. The transfer transistor TxTr is subsequently turned on to transfer the charges of which amount is changed depend on an intensity of light to the floating diffusion region FD. Also, a second output voltage “V
2
” is read from the output terminal Vout to convert analog data for the voltage difference “V
1
-V
2
” into digital data, thereby completing one cycle of the unit pixel operation.
Capacitance of the photodiode C
p
and floating diffusion region C
f
, is very important to achieve a stable operation of the unit pixel. The capacitance C
p
of the photodiode PD improves its ability for sensing lights as area becomes larger, but the size of the chip should be increased in proportion to the size of the unit pixel, and the size of a lens used after completing chip packaging processes should be increased. Because of this increased size of the lens, manufacturing costs increased. On the other hand, the capacitance Cf of the floating diffusion region FD is less than that of the capacitance Cp of the photodiode PD. In other words, as the capacitance Cp of the photodiode PD becomes smaller, the sensing ability is enhanced when charges captured in the photodiode PD are transferred to the floating diffusion region FD. However, if the capacitance Cp of the photodiode PD becomes too small, then charge coupling caused by parasitic capacitance formed between a gate and the floating diffusion region FD increase and mismatching ratios between pixels increase, resulting in severe noise. On the other hand, in case that the capacitance Cf of the floating region FD becomes too large, the sensing ability decreases, and thus, voltage ranges that can be used at the output terminal Vout also decreases. That is, a dynamic range of the output voltage decreases.
It is a trend in today to miniaturize the size of pixels to improve a resolution of image; however, the dynamic range of the output voltage is reduced. Although the structure of the active pixel is commonly used to eliminate noise, a fill factor, which is a ratio of an active area to a whole area, i.e., active area and the rest of supporting areas), is not satisfied sufficiently.
As shown in
FIG. 2A
, a typical structure of the unit pixel has four transistors and two capacitors, of which capacitance is defined by the photodiode PD and the floating diffusion region FP. The area of the photodiode PD decreases relatively as the number of the transistors in the pixel increases. Therefore, the dynamic range of a maximum output voltage of the image sensor declines and sensitivity is also degraded. That is, the unit pixel structure of the conventional image sensor has a lot of transistors and this factor limits the area for the photodiode. Accordingly, the size of die in Mega-level CMOS image sensor should be increased and a development of the CMOS image sensor has many limits. If the size of a pixel is reduced to solve this problem, the photodiode area also decreases and the dynamic range of the output voltage is diminished, resulting in another problem of degrading sensitivity of the CMOS image sensor.
Referring to
FIG. 2B
, in order to solve the above problems, there is a proposed structure to increase the photodiode area by providing three transistors and one capacitor of which capacitance is defined by a photo diode PD in a unit pixel
22
. However, since this structure uses a signal change of the photodiode PD as an output, it becomes worse than the structure constructed with four transistors and two capacitors. Also, a match ratio between pixel arrays is degraded because an initial state of the photodiode PD before a sensing procedure, that is, pinning, is determined with only one transistor.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a CMOS image sensor, capable of increasing a fill factor and a dynamic range of an output voltage, reducing noises, prevent from a match ration be degraded.
It is another object of the present invention to provide a driving method of the CMOS image sensor.
In accordance with an aspect of the present invention, there is provided a complementary metal-oxide-semiconductor (CMOS) image sensor, comprising: a plurality of unit pixel arrayed in rows and columns, wherein the unit pixel including: (a) a charge

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