CMOS FET device with abnormal current flow prevention

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307200B, 307213, 307251, 357 42, 328167, H03K 3353, H03K 1716, H03K 1760, H01L 2978

Patent

active

041684427

ABSTRACT:
A CMOS FET device which comprises an N type semiconductor substrate; a P type well layer formed in the N type semiconductor substrate; a p-channel type MOS transistor provided in the N type semiconductor substrate; an n-channel type MOS transistor formed in the P type well layer; and a noise-absorbing capacitor provided at the input or output terminal of the MOS transistor or at a power supply section.

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patent: 3712995 (1973-01-01), Steudel
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patent: 3955210 (1976-05-01), Bhatia et al.
patent: 3967295 (1976-06-01), Stewart
patent: 4015147 (1977-03-01), Davidson et al.
Dennehy, "Non-Latching Integrated Circuits"; RCA Technical Notes (pub.) TN No.: 876; 2/12/71; 4 pp.
Staples, "Electrical Noise Spike Suppression"; IBM Tech. Discl. Bull.; vol. 15, No. 10, p. 3208; 3/73.
Clapper, "Bandpass Filter Using Differential Amplifier", IBM Tech. Discl. Bull.; vol. 14, No. 3, pp. 815-816, 8/71.

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