CMOS-ECL converter

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307446, 307455, 307451, H03K 1730, H03K 1917

Patent

active

050049399

ABSTRACT:
A CMOS-ECL converter contains a drive stage modified from the prior art and a connected output transistor. The driver stage comprises a resistor element and an n-channel field effect transistor. The resistor element can preferably be constructed with the assistance of a p-channel field effect transistor and is connected in series with the n-channel field effect transistor. The advantage of such an arrangement is that the capacitive load at the input of the CMOS-ECL converter is low because the resistor element or, respectively, the p-channel field effect transistor, offers no contribution to such an input load. The channel width of the p-channel field effect transistor can be set such that an adequately-high base current for the bipolar output transistor can be supplied.

REFERENCES:
patent: 4394589 (1983-07-01), Pham et al.
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4475050 (1984-10-01), Noufer
patent: 4490632 (1984-12-01), Everett et al.
patent: 4896059 (1990-01-01), Goodwin-Johansson
High Performance Bipolar PMOS Logic Switching CKT J. Perris, Jr. et al., IBM Tech Disclosure, vol. 20 #1.
Hudson E. L. et al, "An ECL Compatible 4K CMOS RAM", IEEE International Solid-State Circuits Conference, 1982, pp. 248-249.

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