Measuring and testing – Fluid pressure gauge – Electrical
Reexamination Certificate
2000-07-20
2001-07-24
Oen, William (Department: 2855)
Measuring and testing
Fluid pressure gauge
Electrical
Reexamination Certificate
active
06263740
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a process for fabricating integrated circuit sensors and, more particularly, to a process for fabricating silicon micromachined pressure sensors compatible with a complementary metal oxide semiconductor process.
BACKGROUND OF THE INVENTION
Microsystems technology is a rapidly developing field. One range of microsystems applications is the combination of actuators or sensors and electronic circuits onto a single integrated circuit device. Currently, integrated circuit (IC) sensors and actuators, such as piezoresistive pressure sensors, are manufactured using a surface micromachining process. Surface micromachining has advantages over the previous bulk micromachining process of fabricating sensors and actuators because it permits smaller devices and may by integrated with other circuits on an IC.
One IC technology is complementary metal oxide semiconductor (CMOS) technology. This well-known IC fabrication process provides a very high cell-density (e.g., many circuits per unit area), is relatively inexpensive, and yields reliable circuits. It would be desirable to fabricate piezoresistive pressure sensors, for example, using CMOS technology.
Several techniques for integrating sensors and signal conditioning circuits onto a single IC are known.
FIGS. 1A and 1B
are a cross-sectional view and top view, respectively, of a conventional IC piezoresistive pressure sensor. As seen in
FIGS. 1A and 1B
, a piezoresistive pressure sensor
100
includes a silicon membrane (or diaphragm)
102
micromachined onto a silicon substrate
104
. Resistors
106
are diffused into the membrane
102
at certain locations. A cavity
108
is provided on the underside of the substrate
104
from which pressure is applied to the membrane
102
. Pressure on the silicon membrane stresses the membrane, which affects the resistance of the resistors
106
. The change in resistance
106
is detected by external circuitry
110
, and the change of resistance is used to determine the pressure applied to the membrane
102
.
In order for a piezoresistive sensor described above to operate, membranes having different thicknesses are used for sensing different pressure ranges. Thicknesses typically range from 10 microns to 30 microns. For example, it may be preferable to use a 15 micron thick membrane to sense 15 psi pressure. Thus, in order to provide an accurate piezoresistive pressure sensor for a particular pressure range, the membrane must be fabricated to a precise thickness.
Two techniques typically used for fabricating a micromachined piezoresistive sensor are (1) surface micromachined silicon etching and wafer bonding; and (2) using epitaxial wafers for electrochemical etch stopping. Neither technique is compatible with CMOS fabrication technology. For example, the second technique achieves a precise membrane thickness using an electrochemical etch stop method.
FIGS. 2A and 2B
illustrate the fabrication of a conventional IC piezoresistive pressure sensor using this second technique. As seen in
FIG. 2A
, a p-type silicon substrate
202
has an n-type epitaxial layer
204
grown on it. As seen in
FIG. 2B
, the substrate is etched through etch windows
206
using alkaline etchants (such as KOH) in an etch bath. At the same time, a positive bias
208
is applied to the epitaxial layer
204
. The positive bias does not affect the p-type substrate due to the n-p reverse bias condition. The n-type epitaxial layer (which forms the membrane) is prevented from being etched due to the passivating positive bias. This allows a precise membrane thickness to be obtained. CMOS processes, however, do not allow for n-type epitaxial layers on the substrate. Resistors may then be formed in the membrane using p-type diffusion doping.
Therefore it is an object of the present invention to provide a process for manufacturing IC sensors that is compatible with conventional IC processes, such as CMOS.
SUMMARY OF THE INVENTION
This and other objects of the present invention are provided by a novel process for fabricating an integrated circuit sensor. In a preferred embodiment of the present invention, a pressure sensor is fabricated onto a substrate using conventional IC fabrication processes, such as CMOS processes.
A preferred embodiment of the present invention includes a pressure sensor integrated onto an IC using CMOS processes. The pressure sensor is preferably built on a substrate having a first conductivity type (such as p-type) and has defined in it a well of an opposite conductivity type (such as n-type). This well defines a membrane. Resistors are diffused into the well. In a preferred embodiment, four resistors are provided. Two of these resistors are oriented parallel to the principal stress of the membrane and two resistors are oriented perpendicularly to the principal stress of the membrane. Source/drain doping in the CMOS process are also used for providing leadouts for the resistors. A cap (such as an n-cap) is provided for the resistors to bury the resistors and shield them from oxide or outside charges, thus increasing their electrical stability. Metalization contacts may be provided to connect the membrane to a positive bias during a membrane etching process. A cavity is provided on the underside of the substrate through which pressure is applied to the membrane. Signal conditioning circuitry, such as an operational amplifier, may also be fabricated on the same substrate and, preferably, using the same IC processes. The cap may preferably be implanted during implantation of a lightly doped drain region of the signal conditioning circuitry.
A pressure sensor according to the present invention may be fabricated using the following preferred process:
1. in a substrate having a first conductivity type, forming a well region having a second, opposite conductivity type;
2. forming in the well one or more resistors;
3. forming source and drain regions in portions of the well and resistors;
4. implanting impurities having the second conductivity type over a surface of the well, resistors, and source and drain regions;
5. forming metal contacts connected to the well; and
6. forming a cavity on the underside of the sensor by applying an electrical bias of the first conductivity type on the well via the contacts while etching the substrate, thus defining in the well a membrane having precise thickness.
In a preferred embodiment of the present invention, steps 2-5 may be performed during conventional IC processing (such as CMOS processing). Step 1 constitutes a pre-processing stage and step 6 constitutes a post-processing stage.
REFERENCES:
patent: 5281836 (1994-01-01), Mosser et al.
patent: 5343064 (1994-08-01), Spangler et al.
patent: 5589082 (1996-12-01), Lin et al.
patent: 5589689 (1996-12-01), Koskinen
patent: 5631198 (1997-05-01), Hartauer
patent: 0 040 795 (1981-12-01), None
Dow Foo Pang
Mnoon Yan Loke
Sridhar Uppili
Institute of Microelectronics
Oen William
Proskauer Rose LLP
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