CMOS clock receiver with feedback loop error corrections

Details CMOS clock receiver with feedback loop error corrections CMOS clock receiver with feedback loop error corrections

2011-08-23

2011-08-23

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

Reexamination Certificate

active

08004331

ABSTRACT:
A system for correcting duty cycle errors in a clock receiver that includes a differential amplifier having inputs for a pair of differential clock signals. A duty cycle error detector has inputs for a pair of amplified clock signals and an output for a duty cycle error correction signal. A signal conditioner is also provided with the differential amplifier having an input for the duty cycle error correction signal. Furthermore, the signal conditioner adjusts the differential clock signals in response to the duty cycle error correction signal. Also, a system for correcting cross point errors in a clock receiver that includes a differential amplifier having inputs for a pair of differential clock signal. A cross point error detector has inputs for a pair of amplified clock signals and an output for a cross point error correction signal. A signal conditioner is also provided with the differential amplifier having an input for the cross point error correction signal. Furthermore, the signal conditioner adjusts the differential clock signals in response to the cross point error correction signal.

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