CMOS circuit with separate power lines to suppress latchup

Details CMOS circuit with separate power lines to suppress latchup CMOS circuit with separate power lines to suppress latchup

1985-10-08

1986-05-27

Clawson, Jr., Joseph E.

357 43, 357 51, 357 68, H01L 2702

Patent

active

045918953

ABSTRACT:
A semiconductor device including a plurality of CMOS (Complementary Metal Oxide Semiconductor) elements, each comprised of a conventional source region, a drain region, and a diffusion region located adjacent to source and drain elements, and each driven by a power source. A first conductor and a second conductor, which are newly introduced in the present device, are physically independent from each other. The first conductor is connected between the power source and the source region. The second conductor is connected between the power source and the diffusion region.

REFERENCES:
patent: 3702943 (1972-11-01), Heuner et al.
patent: 3946424 (1976-03-01), Tarui et al.
patent: 3955210 (1976-05-01), Bhatia et al.
patent: 4053798 (1977-10-01), Koike et al.
patent: 4062039 (1977-12-01), Nishimura
patent: 4223337 (1980-09-01), Kojima et al.
patent: 4233672 (1980-11-01), Suzuki et al.
patent: 4273805 (1981-06-01), Dawson et al.
patent: 4300061 (1981-11-01), Mihalich et al.
Suzuki et al., "A New Single-Chip C.sup.2 MOS A/D Converter for Microprocessor Systems-Penta-Phase Integrating C.sup.2 MOS A/D Converter, IEEE Journal of Solid-State Circuits, vol. SC-13, No. 6, Dec., 1978, pp. 779-785.

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