CMOS circuit composed of CMOS circuit blocks arranged in bit-par

Details CMOS circuit composed of CMOS circuit blocks arranged in bit-par CMOS circuit composed of CMOS circuit blocks arranged in bit-par

1997-07-09

2000-10-03

Pham, Chi H.

Pulse or digital communications

Synchronizers

375359, H04L 700

Patent

active

061283568

ABSTRACT:
Data transmission through data paths is synchronized using a symmetrical clock signal. In order to avoid dynamic hazards, which arise due to different delay times during data transmission in the data paths, an intermediate storage element is respectively arranged in each data path. It does not forward the received data signals into the subsequent circuit blocks until towards the end of the clock signal impulse used for the synchronization of the data transmission.

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P E Landman et al, Power Estimation for High Level Synthesis, IEEE (1993), pp. 361-366.
W Ulbrich et al, Design of Dedicated MOS Digital Filters For High-Speed Applications, Proceedings of ISCAS (1985), pp. 255-258.

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