CMOS Charge pump free of parasitic injection

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307296R, 357 42, 357 51, 363 60, H01L 2704, H01L 2978, H02M 719

Patent

active

045595488

ABSTRACT:
A charge pump bias generator constructed of P channel MOSFETs in an N type substrate is used to provide a negative bias to a P well containing active N-channel MOSFET circuit elements to reverse bias the N type source to P well junctions. Since the charge pump uses P channel FETs in an N substrate with the N substrate connected to the positive power supply, parasitic minority carrier injection by the charge pump is prevented.

REFERENCES:
patent: 4233672 (1980-11-01), Suzuki et al.
patent: 4255677 (1981-03-01), Boonstra et al.
patent: 4377756 (1983-03-01), Yoshihara et al.
Franz et al, IBM Tech. Discl. Bulletin, vol. 11, No. 10, Mar. 1969, p. 1219.
Shimohigashi et al., "An N-Well CMOS Dynamic RAM," International Electron Devices Meeting, Washington, D.C., pp. 835-836, Dec. 7, 1980, Technical Digest.

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