CMOS Boolean logic mechanization

Details CMOS Boolean logic mechanization CMOS Boolean logic mechanization

1974-12-23

1976-10-12

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307207, 307214, 307217, 307218, H03K 1908, H03K 1912, H03K 1928, H03K 1938

Patent

active

039860426

ABSTRACT:
Unique, relatively simplified circuits employing complementary metal oxide semiconductor transistors and suitable diode means to mechanize the Boolean functions A.sup.. B and A+B and combinations thereof. In a preferred embodiment, the transistors and diodes may be fabricated by silicon-on-sapphire integrated circuit techniques. The circuits obviate the need for a conventional NOR or NAND gate which is common to logic gating arrangements of the prior art. Hence, the number of components and the corresponding cost of the circuit are reduced while the operating speed thereof is increased.

REFERENCES:
patent: 3356858 (1967-12-01), Wanlass
patent: 3577005 (1971-05-01), Christensen
patent: 3676705 (1972-07-01), Meyer
patent: 3691401 (1972-09-01), Forlani et al.
patent: 3769523 (1973-10-01), Suzuki
patent: 3829710 (1974-08-01), Hirasawa et al.
patent: 3890512 (1975-06-01), Kumakawa et al.
boleky et al., "High-Performance Low-Power CMOS Memories Using Silicon-On-Sapphire Technology," IEEE J. Solid-State Circuits, vol. SC-7, pp. 135-145, 4/1972, As Reprinted in Semiconductor Memories, IEEE Press, pp. 84-94, 1972.

Affiliated with

Also associated with

Rating

CMOS Boolean logic mechanization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS Boolean logic mechanization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS Boolean logic mechanization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-945019