CMOS binary up/down counter

Electrical pulse counters – pulse dividers – or shift registers: c – Particular transfer means – Including logic circuit

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Details

377117, 377123, 377121, H03K 2344, H03K 2352, H03K 2356

Patent

active

048560359

ABSTRACT:
A high speed CMOS binary up/down counter having a 200 MHZ clock rate comprises a 4-bit counting section that may be concatenated in multiple 4-bit sections. The counter performs in an up-count mode or a down-count mode in accordance with the state of a mode select signal. Each stage of the 4-bit counting section comprises a propagate/kill/generate gate for determining the status of a carry signal to a next stage, except the last stage of a 4-bit section, which does not require such a gate because it is coupled to a carry-forward generator along with the outputs from the other preceeding stages in the section. Each 4-bit section performs the counting function through a successive process of modulo-two sums of a lower order carry and the current state of a counter stage without the need for cumbersome gating structures.

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