CMOS binary equals comparator with carry in and out

Details CMOS binary equals comparator with carry in and out CMOS binary equals comparator with carry in and out

1987-06-25

1989-01-10

Harkcom, Gary V.

Communications: electrical

Digital comparator systems

G05B 100, G06F 702

Patent

active

047976500

ABSTRACT:
A CMOS binary equals comparator circuit suitable for chaining into an n-bit equals comparator has carry in and carry out terminals with three MOSFETs and an inverter connected to pass through a high carry in voltage to the carry out terminal but to allow the comparison of the first and second bits in additional circuitry to determine the carry out voltage with a low carry in voltage. Further MOSFETs, in one P channel and one N channel pair, are interconnected and provided with the first bit, second bit and complement of the second bit to detect equality of the first and second bits. The circuit uses a small number of transistors per bit for the comparison.

REFERENCES:
patent: 3137789 (1964-06-01), Chiapuzio, Jr.
patent: 3305831 (1967-02-01), Nelson
patent: 3492644 (1970-01-01), Jensen
patent: 3500321 (1970-08-01), Cottrez
patent: 3517175 (1970-06-01), Williams
patent: 4323982 (1982-04-01), Eichrodt et al.
patent: 4694274 (1987-09-01), Shimada et al.
Gautier et al., "Two-Bit Words Comparison Circuit", IBM Technical Disclosure Bulletin, vol. 18, #8, pp. 2544-2545, Jan. 1976.

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