CMOS Analog to digital converter with selectable voltage followe

Details CMOS Analog to digital converter with selectable voltage followe CMOS Analog to digital converter with selectable voltage followe

1980-10-23

1982-04-06

Miller, Charles D.

Communications: electrical

Audible indication

Percussion-type sound producer

307355, H03K 1302

Patent

active

043238874

ABSTRACT:
An analog to digital converter is fabricated using CMOS construction and uses a successive approximation register to develop the bits in a digital word. A digital to analog converter converts the digital word to analog voltages which are compared with the analog input. The comparator is coupled to the register so as to determine its word bit sequence. The digital words most significant bit is set first in accordance with whether the analog input is greater or less than half of the reference voltage. Then the next most significant bit is evaluated and this process is continued until the least significant bit is evaluated at which time the conversion is complete. In the CMOS circuit, a switched comparator is employed and it draws a capacitor charging current in its operation. Accordingly, it is useful to buffer the comparator input. Two buffers are employed, one p-type and one n-type. They have common inputs and outputs that are selected as a function of the most significant bit in the digital word. The selected output is coupled to the comparator so that the comparator does not load the analog signal input.

REFERENCES:
patent: 3525948 (1966-03-01), Saerer
patent: 4068138 (1978-01-01), Miyakawa
patent: 4191900 (1980-03-01), Redfern
patent: 4197472 (1980-04-01), Aoki
patent: 4211942 (1980-07-01), Aoki
Spinairne "Rev. Sci. Instrum.", vol. 47, No. 4, Apr. 1976, pp. 437-439.

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