CMOS analog switch

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device

Reexamination Certificate

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Details

C327S404000, C327S389000

Reexamination Certificate

active

07129766

ABSTRACT:
A CMOS analog switch is provided that can handle negative input polarity. The semiconductor substrate wherein the analog switch is formed has a substrate area of n-conductivity type. First and second p-channel transistors are formed in the n-conductivity substrate area and each have a gate, a source connected to the input terminal and a drain connected to the output terminal. The analog switch further has a comparator for comparing a voltage level at the input terminal with ground level, a switch driven by an output of the comparator to selectively connect the n-conductivity area with the signal input terminal for a positive input voltage level or to ground for a negative input voltage level, and control circuitry providing gate control signals for the first and second p-channel transistors. The inherent substrate diodes are effectively kept from becoming conductive.

REFERENCES:
patent: 5475332 (1995-12-01), Ishimoto
patent: 5880621 (1999-03-01), Ohashi
patent: 5994744 (1999-11-01), Katayama et al.
patent: 6577263 (2003-06-01), Saito
patent: 6828846 (2004-12-01), Tsukazaki et al.
patent: 6842063 (2005-01-01), Tachibana et al.

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