CMOS Analog multiplier for CCD signal processing

Details CMOS Analog multiplier for CCD signal processing CMOS Analog multiplier for CCD signal processing

1977-10-17

1979-05-29

Ruggiero, Joseph F.

Boots, shoes, and leggings

307221D, 364862, G06G 716

Patent

active

041569245

ABSTRACT:
An analog multiplier for multiplying the signals derived from a charge coupled device (CCD) tap includes a balanced multiplier of a first conductivity-type and a buffer of a second conductivity-type coupled between the CCD tap and the balanced multiplier. The multiplier includes first and second transistors, the drains of which are coupled together to form an input. The buffer includes a load transistor coupled to the output of an amplifying transistor. Means are included for coupling the output of the amplifier transistor and the multiplier input.

REFERENCES:
patent: 3956624 (1976-05-01), Audaire et al.
patent: 4032767 (1977-06-01), Lagnado
patent: 4052606 (1977-10-01), Heller et al.
patent: 4071777 (1978-01-01), Herrmann
patent: 4084256 (1978-04-01), Engeler et al.
Bosshart-"An Integrated Analog Correlator Using Charge-Coupled Devices"-1976 IEEE International Solid-State Circuits Conference-Digest of Technical Papers, pp. 198, 199.

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