CMOS amplifier circuit and CCD delay line with CMOS amplifier

Details CMOS amplifier circuit and CCD delay line with CMOS amplifier CMOS amplifier circuit and CCD delay line with CMOS amplifier

1991-09-20

1993-10-12

Wambach, Margaret R.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307358, 307359, 307264, 307491, 377 58, 377 60, 330253, 330260, H03K 513, H03K 5153

Patent

active

052528685

ABSTRACT:
A CCD amplifier circuit including an active load type source-grounded inverting amplifier circuit which includes a driving MOS transistor, an active load MOS transistor connected to the driving MOS transistor, and a control circuit. The control circuit controls the voltage at the gate electrode of the active load MOS transistor with a control signal of low output impedance which is substantially inversely proportional to the drain-source voltage of the active load MOS transistor and level-shifted by a predetermined voltage. Further, a CCD delay line includes a floating diffusion region of predetermined impurities formed at an end of a charge-coupled device with a gate section having a predetermined fixed gate voltage, and a switched capacitor integrator for detecting the injection charge of the floating diffusion region to detect signal charges transferred to the floating diffusion region from the charge-coupled device. The CCD amplifier circuit is employed as an output circuit of the switched capacitor integrator.

REFERENCES:
patent: 4075515 (1978-02-01), Hoffmann
IBM Tech. Disc. Bul "CCD Floating Diffusion Output Tap" vol. 25 No. 11B Apr. 1983, Schlig.
IEEE Journal of Solid-State Circuits, vol. SC-16, No. 5, Oct. 1981, "CCD Memory Using Multilevel Storage" Terman et al.

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