CMOS Address buffer for a semiconductor memory

Details CMOS Address buffer for a semiconductor memory CMOS Address buffer for a semiconductor memory

1981-09-09

1984-03-06

Popek, Joseph A.

Static information storage and retrieval

Addressing

365203, 3072383, G11C 700

Patent

active

044357915

ABSTRACT:
An input circuit for applying a supply voltage to the input/output voltage nodes of a regenerative latch in response to date inputs. A reference transistor applies a portion of the supply voltage to one node and a data transistor applies the full supply voltage to the other node in response to a data input signal. Write transistors control the connection of the data and reference transistors to the supply voltage. A precharge circuit is connected to the voltage nodes.

REFERENCES:
patent: 3860831 (1975-01-01), Goser

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