CMOS active pixel sensor using native transistors

Details CMOS active pixel sensor using native transistors CMOS active pixel sensor using native transistors

2001-03-20

2002-11-05

Le, Que T. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C250S2140RC

Reexamination Certificate

active

06476372

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to active pixel sensors. In particular, the present invention relates to active pixel sensors manufactured under a complementary metal-oxide-silicon (CMOS) process.
2. Discussion of the Related Art
Active pixel sensors (APS) are used in imaging applications, such as digital cameras. APS are described, for example, in the articles: (a) “256×256 CMOS Active Pixel Sensor Camera-on-a-Chip” by Nixon et al., IEEE International Solid-State Conference (ISSCC
96
), pp.178-179, and (b) “Current-Mediated, Current-Reset 768×512 Active Pixel Sensor Array” by R. D. McGrath et al., IEEE International Solid-State Conference (ISSCC
96
), pp.182-183.
These articles describe APS arrays and associated digital logic circuits which are integrated into integrated circuits. Logic circuits integrated with APS arrays are, for example, circuits for performing the timing and control functions of a “camera-on-a-chip”. Typically, a conventional CMOS process is used to manufacture such an integrated circuit, since both the logic circuits and the APS array can be formed using CMOS transistors and diodes of such a conventional process. A typical APS
100
, which is the building block of an APS array, is shown in FIG.
1
.
As shown in
FIG. 1
, APS
100
includes transistors
101
,
102
and
103
, and a photodiode
104
. An on-chip current source
105
allows the state of the APS to be read out. The drain and source terminals of transistor
101
are respectively coupled to a reference supply (V
ref
)
106
and a cathode (
107
) of photodiode
104
, whose anode is coupled to a ground or fixed reference voltage (V
ss
). The source terminal of transistor
101
drives the gate terminal of transistor
102
, whose drain and source terminals are coupled respectively to a power supply (V
cc
)
109
and drain terminal
108
of transistor
103
. Reference supply (V
ref
)
106
can be, but need not be, power supply (V
cc
)
109
. The source terminal of transistor
103
is coupled to current source
105
. During operation, a high reset voltage is initially provided at transistor
101
to pull node
107
up to a dark reference voltage (V
reset
). If the active reset voltage is high enough to keep transistor
101
in the linear region, dark reference voltage V
reset
equals V
ref
. Keeping transistor
101
in the linear region is desired because the dark reference voltage V
reset
is then immune from noise in the threshold voltage (V
T
) of transistor
101
. When the reset voltage is turned off, the charge trapped at photodiode
104
's cathode (i.e., node
107
) maintains a high voltage there. When APS
100
is exposed to light, photodiode
104
discharges node
107
to bring the voltage at node
107
towards the ground reference voltage. The voltage at node
107
can be read by turning on transistor
103
, by applying a selection voltage at the gate terminal of transistor
103
, and sensing the output voltage V
out
at terminal
120
. For an undischarged pixel, voltage V
out
is given by:
V
out
=V
reset
−V
noise
−V
T
where V
reset
is the dark reference voltage at node
107
, V
noise
represents a reset noise, and V
T
is the threshold voltage for transistor
102
. Because of the functions they perform, transistors
101
and
102
are often referred to as a “reset switch” and a “read-out amplifier,” respectively.
As discussed above, if transistor
101
is a typical CMOS transistor, transistor
101
can operate in the linear region, so that V
reset
can be made very close to reference supply voltage V
ref
. In a transistor typically used in a CMOS logic circuit, the threshold voltage V
T
is approximately 0.8 volts. Such a threshold voltage is typically set by a P-type “V
t
adjustment” implant into the channel region. With a 3.3 volts back-bias (i.e., a source terminal voltage of 3.3 volts relative to the substrate), V
T
can be in excess of 1 volt. Consequently, V
out
has an output swing of less than 2 volts between the undischarged state and the discharged state of APS
100
, as shown in the oscilloscope trace in FIG.
2
. If the reset voltage at the gate terminal of transistor
101
is set to V
ref
, V
reset
is approximately V
ref
−V
T
, the output swing is even less. Thus, the active pixel sensor of the prior art has poor performance under low power supply conditions.
SUMMARY OF THE INVENTION
The present invention provides an active pixel sensor (APS) with an increased output swing, using transistors of low threshold voltages.
In one embodiment, native transistors with a threshold voltage of approximately zero volts are provided in an APS of the present invention to achieve a 35% increase in output swing. Alternatively, depletion mode transistors can be used to achieve even higher increased output swing.
In one embodiment, a native transistor can be achieved by protecting the channel region during a threshold voltage (V
T
) adjustment implant step. In that embodiment, since the threshold voltage adjustment implant step is separately masked, no additional masking step is required to achieve the APSs of the present invention.
The present invention is better understood upon consideration of the detailed description below and the accompanying drawings.


REFERENCES:
patent: 5831258 (1998-11-01), Street
patent: 5850093 (1998-12-01), Tarng et al.
patent: 5892253 (1999-04-01), Merrill
patent: 5933190 (1999-08-01), Dierickx et al.
patent: 5952686 (1999-09-01), Chou

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