CMIS chip-select circuit

Details CMIS chip-select circuit CMIS chip-select circuit

1983-09-26

1986-04-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307469, 307481, 365229, H03K 17693, H03K 19096

Patent

active

045815496

ABSTRACT:
A CMIS circuit device such as an IC chip in a semiconductor memory device, is made selectable by using at least two chip-select signals having opposite polarities. The CMIS circuit device has a chip-select control circuit for establishing a chip-selected state or a chip-unselected state upon receiving the abovementioned chip-select signals. The chip-select control circuit includes a CMIS inverter circuit which inverts one of the chip-select signals, and a CMIS logic gate circuit which receives an output signal from the CMIS inverter circuit and the other chip select signal or signals and outputs an internal chip-select control signal. The CMIS inverter circuit includes a CMIS inverter and one or more control transistors which receive the other chip-select signal or signals at the gates thereof and which are inserted in series between a power terminal of the CMIS inverter and a power source.

REFERENCES:
patent: 4337525 (1982-06-01), Akatsuka

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