Cluster controller memory arbiter

Details Cluster controller memory arbiter Cluster controller memory arbiter

1988-02-01

1991-03-26

Fleming, Michael R.

Boots, shoes, and leggings

3642281, 3642384, 364239, G06F 1300

Patent

active

050034618

ABSTRACT:
A memory arbiter for a cluster controller having a protocol controller, a main processing unit (MPU) and a shared common global random access memory (RAM) wherein a combination of buffers and latches enable zero wait-state access to the common global RAM to be zero-wait-state for the MPU. This result is achieved by the common global RAM inserting wait-states on the protocol controller whenever both the protocol controller and the MPU are requesting access of the common global RAM.

REFERENCES:
patent: 4096572 (1978-06-01), Namimoto
patent: 4302808 (1981-11-01), Zanchi et al.
patent: 4339808 (1982-07-01), North
patent: 4536839 (1985-08-01), Shah et al.
patent: 4562535 (1985-12-01), Vincent et al.
patent: 4688172 (1987-08-01), Wright
patent: 4701878 (1987-10-01), Gunkel et al.
patent: 4773005 (1988-09-01), Sullivan
patent: 4847757 (1989-07-01), Smith
patent: 4858173 (1989-08-01), Stewart et al.
patent: 4942550 (1990-07-01), Murray
patent: 4954979 (1990-09-01), Eibner et al.

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