Image analysis – Histogram processing
Reexamination Certificate
1999-02-05
2003-01-07
Wu, Jingge (Department: 2623)
Image analysis
Histogram processing
C382S274000, C348S672000
Reexamination Certificate
active
06504954
ABSTRACT:
BACKGROUND
The present invention relates generally to histogram specification systems and methods, and more particularly, to systems and methods that implement closed loop piecewise-linear histogram specification processing.
A primary signal processing function carried out by forward looking infrared (FLIR) video processing electronics is output processing that converts between a high dynamic-range internal representation of the video signal and a lower dynamic-range representation suitable for display on a monochrome monitor. The goal of such an output processor is to optimize the image contrast on a frame-by-frame basis while retaining as much of the original information content as possible. Typically, a histogram of the internal video signal is collected by the signal processor in static random access memory (RAM). The system controller reads this histogram from the signal processor after each video frame in order to create an output lookup-table that converts between the high dynamic-range and low dynamic-range signal representations.
Several histogram equalization algorithms (which result in output video with a uniform distribution function), and histogram specification algorithms (which result in output video with a specified, but not necessarily uniform, distribution function) have been implemented in the FLIR systems developed by the assignee of the present invention. Smaller scale and lower power FLIR systems currently in development by the assignee of the present invention, however, are limited in their output processing capabilities, primarily because conventional histogram equalization and specification techniques impose unacceptably high communication bandwidth and computational-load requirements on the system controller. Systems that use 8-bit microcontrollers and field programmable gate arrays in order to reduce power, board space and cost, currently use linear output processing with automatic gain control rather than histogram-based techniques. As a result, the output video generated by these systems lack fine detail associated with higher-end systems. The present invention results in significantly improved visual imagery and information content on low-power compact systems, by enabling histogram-based output processing in systems with limited computational power and communication bandwidth.
Prior art relating to the present invention includes U.S. Pat No. 3,983,320 entitled “Raster Display Histogram Equalization”, U.S. Pat No. 4,353,092 entitled “Real Time Histogram Modification System”, and U.S. Pat No. 4,445,138 entitled “Real-Time Dynamic Range Compression for Image Enhancement”.
The closest prior art is disclosed in U.S. Pat. No. 4,353,092. A real-time system is described in this patent, in which a lookup-table is used as a “quantizer” to convert between a high dynamic-range input signal and a low dynamic-range output signal. A complete histogram of the output signal is collected in RAM and compared to a specified histogram. The lookup table is then reloaded with new values such that, on the next iteration, the output histogram will be closer to the specified histogram.
The present invention improves upon that disclosed in U.S. Pat. No. 4,353,092 in several key respects. Most significantly, U.S. Pat. No. 4,353,092 requires a means for collecting a complete (i.e., non-coarse) output histogram. The compact low-power systems targeted by the present invention do not have the board space or power budget to accommodate such a collection, nor do these systems have the communication bandwidth required to transfer all of this data to a system controller. U.S. Pat. No. 4,353,092 teaches the use of a lookup-table to implement the transfer function, as opposed to a piecewise-linear approach used in the present invention. In the present invention, the piecewise-linear transfer function is intricately coupled with the coarse histogram collection, in that each piecewise-linear segment corresponds to one of the coarse histogram bins. This coupling is key to the reduction in computational load and communications bandwidth achieved in the present invention.
A piecewise-linear approach to contrast enhancement is presently used in one high-end system developed by the assignee of the present invention. However, in this system, a complete histogram of the input data is required to compute the piecewise-linear breakpoints. In the present invention, collection of the input histogram is eliminated through the use of a closed-loop algorithm based on a coarse collection of the output histogram. The compact low-power systems targeted by the present invention do not have the computational power or communication bandwidth required to implement the method used in this system.
It would therefore be desirable to have systems and methods that implement closed loop piecewise-linear histogram specification that improves upon conventional processing systems and methods of contrast enhancement and dynamic range conversion.
SUMMARY OF THE INVENTION
The present invention provides for systems and methods for computing and applying a real-time transformation between digital input and output signals for the purpose of output histogram specification. The systems and methods utilize a piecewise-linear transfer function, coarse output histogram collection, and a closed-loop algorithm to achieve a target (or specified) coarse histogram. The use of a piecewise-linear transfer function in conjunction with coarse output histogram collection, where the number of bins collected is equal to the number of piecewise-linear segments, results in a significant reduction in computational load and communication bandwidth in comparison to conventional histogram specification methods. The present invention enables compact low-power implementations that contain a system controller to implement the closed-loop algorithm, and a signal processor to implement the piecewise-linear transfer function and coarse output histogram collection.
REFERENCES:
patent: 4353092 (1982-10-01), Bailey et al.
patent: 4573035 (1986-02-01), Dolazza
patent: 5063607 (1991-11-01), FitzHenry et al.
patent: 5339368 (1994-08-01), Higgins-Luthman et al.
patent: 5490222 (1996-02-01), Sugimoto
patent: 5982926 (1999-11-01), Kuo et al.
patent: 6061091 (2000-05-01), Van De Poel et al.
patent: 6236751 (2001-05-01), Farrell
Alkov Leonard A.
Lenzen, Jr. Glenn H.
Raytheon Company
Wu Jingge
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