Clocking method and apparatus for display device with calculatio

Details Clocking method and apparatus for display device with calculatio Clocking method and apparatus for display device with calculatio

1994-02-10

1997-03-11

Tung, Kee M.

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

345 87, 345 91, G09G 336

Patent

active

056106270

ABSTRACT:
A clock generation circuit (23) is provided for use with a data display device and a calculation unit, with the calculation unit performing a calculation in a calculation mode resulting in data which is displayed on the data display device. The clock generation circuit generates a first clock signal (CK2) and a second clock signal (CK1). The second clock signal (CK1) is generated by a circuit (52) only during a calculation mode. A clock switching circuit (54) selects, in dependence upon whether the calculation mode is being executed, between a clock signal (CKD) derived from the signal (CK1) and an independently-produced clock signal (CKI) for use as the first clock signal (CK2). Thus, power is conserved by turning off the circuit (52) during a pure display mode and by turning off an oscillator (24) which generates the signal (CKI) during a calculation mode.

REFERENCES:
patent: 4218876 (1980-08-01), Hashimoto et al.
patent: 4850676 (1989-07-01), Yazaki et al.
patent: 4909607 (1990-03-01), Ross
patent: 4926168 (1990-05-01), Yamamoto et al.
patent: 5049865 (1991-09-01), Nakamura et al.

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