Clocked logic circuitry preventing double driving on shared data

Details Clocked logic circuitry preventing double driving on shared data Clocked logic circuitry preventing double driving on shared data

1990-04-09

1992-02-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 852, H04J 302

Patent

active

050864270

ABSTRACT:
A system wherein multiple sources of data each have drivers for transmitting data to a common system bus. The drivers are each managed by individual enabling logic which is controlled by a flip-flop driven by a clock. Thus no driver can connect and drive data onto the bus until one clock period after the previously connected driver has been disabled and disconnected from the bus.

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