Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2006-02-21
2006-02-21
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S119000
Reexamination Certificate
active
07002499
ABSTRACT:
A digital-to-analog converter is disclosed, comprising an input/output circuit, a bistable circuit connected with the input/output circuit, a clock circuit connected with the input/output circuit and the bistable circuit, and a current generator circuit connected with the clock circuit. The clock circuit acts as a switch, providing current from the current generator either to the input/output circuit or to the bistable circuit. The digital input signal switches when the current generator provides current to the bistable circuit, and switching of the input signal is asserted at the output of the converter when the current generator provides current to the input/output circuit. Therefore, switching of a clock circuit signal, rather than switching of the digital input signal determines switching of the output signal, in order to reduce intersymbol interference of the converter associated with thermal hysteresis of some of the components of the converter.
REFERENCES:
patent: 2914758 (1959-11-01), Retzinger, Jr.
patent: 4083043 (1978-04-01), Breuer
patent: 4112426 (1978-09-01), Hofer et al.
patent: 5343196 (1994-08-01), Harston
patent: 5450084 (1995-09-01), Mercer
patent: 5625360 (1997-04-01), Garrity et al.
patent: 5933107 (1999-08-01), Tan
patent: 6061010 (2000-05-01), Adams et al.
patent: 6124817 (2000-09-01), Ho
patent: 6191719 (2001-02-01), Bult et al.
patent: 6346899 (2002-02-01), Hadidi
patent: 6417793 (2002-07-01), Bugeja et al.
patent: 6476748 (2002-11-01), Galton
patent: 6507295 (2003-01-01), Volk
patent: 6597303 (2003-07-01), Cosand
patent: 6621438 (2003-09-01), Hong
patent: 6628220 (2003-09-01), Cosand
patent: 6639534 (2003-10-01), Khoini-Poorfard et al.
patent: 6788229 (2004-09-01), Wittlinger
patent: 6833801 (2004-12-01), Ostrem et al.
patent: 6879276 (2005-04-01), Devendorf et al.
patent: 6919834 (2005-07-01), Inukai
U.S. Appl. No. 10/761,790, filed Jan. 21, 2004, Cosand.
Adams, R., et al., “A 113-dB SNR Oversampling DAC With Segmented Noise-Shaped Scrambling,”IEEE Journal of Solid-State Circuits,vol. 33, No. 12, pp. 1871-1878 (1998), no month.
Adams, R., et al., “A 113dB SNR Oversampling DAC with Segmented Noise-Shaped Scrambling,”IEEE International Symposium on Circuits and Systems,pp. 62-64 (1998), no month.
Chan, K. T., et al., “Components For A GAAS Delta-Sigma Modulator Oversampled Analog-To-Digital Converter,”IEEE International Symposium on Circuits and Systems,pp. 1300-1303 (1992), no month.
HRL Laboratories LLC
Ladas & Parry LLP
Wamsley Patrick
LandOfFree
Clocked D/A converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Clocked D/A converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clocked D/A converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3705965