Clock voltage supply

Details Clock voltage supply Clock voltage supply

1987-08-18

1988-11-29

Miska, Vit W.

Horology: time measuring systems or devices

Time interval

Electrical or electromechanical

368156, 307269, 331 2, 371 36, 371 68, G04F 800, H03L 700, H03K 102

Patent

active

047886706

ABSTRACT:
A clock voltage supply for electronic control circuits such as a computer system for generating four clock signals which are synchronous as to frequency and phase. When n=4, the clock signals are generated with the help of four PLL clocks. So that the four clock signals can continue to appear even if one of the four clocks is malfunctioning, the clock signals of the four clocks are supplied to four (3:4) voters from whose outputs the clock signals are then supplied. Since each voter circuit brings about a certain delay time, which significantly limits the frequency of the clock signals, a delay element is connected downstream to each of the voter outputs respectively. The delay time of the respective delay element, plus the delay time of the respective voter connected therewith, is an integral multiple of the period of the intended clock frequency. For PLL control, the output of each delay element gives the nominal phase position and the output of each clock gives the actual phase position.

REFERENCES:
patent: 3900741 (1975-08-01), Fletcher
patent: 4096396 (1978-06-01), Belforte et al.
patent: 4227158 (1980-10-01), Schroeder et al.
patent: 4276645 (1981-06-01), Lager et al.
patent: 4497059 (1985-01-01), Smith
patent: 4521745 (1985-06-01), Falconer
patent: 4659999 (1987-04-01), Motoyama et al.
patent: 4683570 (1987-07-01), Bedard et al.
Article from FTCS-11 The Eleventh Annual International Symposium on Fault-Tolerant Computing, titled "Fault-Tolerant Clocking System" by T. Basil Smith; IEEE Catalog No. 81CH1600-6.

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