Clock system having a stall capability to enable processing of e

Details Clock system having a stall capability to enable processing of e Clock system having a stall capability to enable processing of e

1981-04-03

1984-07-24

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 700, G06F 1100

Patent

active

044620721

ABSTRACT:
A microprogrammed commercial instruction processor (CIP) is placed in a stall mode during the transfer of information between the CIP and main memory by stalling a free running clock signal. When the transfer of information is completed, the free running clock cycles. If main memory indicates an error condition, then the free running clock signal is again stalled after one cycle to allow the firmware in the CIP to process the error.

REFERENCES:
patent: 4021784 (1977-05-01), Kimlinger
patent: 4348743 (1982-09-01), Dozier

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