Clock system and applications thereof

Oscillators – Combined with particular output coupling network

Reexamination Certificate

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Details

C331S045000, C327S115000, C327S118000

Reexamination Certificate

active

07940132

ABSTRACT:
A clock system includes a phase locked loop, a phase divider, and a control module. The phase locked loop (PLL) produces a plurality of phase-offset output oscillations. The phase divider generates a clock signal from one or more of the plurality of phase-offset output oscillations based on a phase divider control signal. The control module generates the phase divider control signal based on a desired setting for the clock signal.

REFERENCES:
patent: 6867656 (2005-03-01), Hajimiri et al.
patent: 7098707 (2006-08-01), Starr et al.
patent: 2009/0042528 (2009-02-01), Pellerano et al.

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