Clock synthesis using polyphase numerically controlled...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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C327S291000, C331S045000, C331S046000

Reexamination Certificate

active

07598790

ABSTRACT:
A clock synthesis circuit includes a polyphase numerically controlled oscillator, an extraction circuit, and a clock signal generation circuit. The polyphase numerically controlled oscillator generates sets of periodic output signals. Each set of the periodic output signals represents a different phase of a periodic waveform signal. The extraction circuit extracts a most significant bit from each set of the periodic output signals of the polyphase numerically controlled oscillator to generate most significant bits. The clock signal generation circuit converts the most significant bits into a serial bit stream that serves as an output clock signal.

REFERENCES:
patent: 4933890 (1990-06-01), Nuytkens et al.
patent: 6650721 (2003-11-01), Janesch et al.
patent: 7109808 (2006-09-01), Pelt
patent: 7288972 (2007-10-01), Esposito et al.
patent: 7406134 (2008-07-01), Esposito
In-Gi Lim and Whan-Woo Kim, “A Numerically Controlled Oscillator with a Fine Phase Tuner and a Rounding Processor,” ETRI Journal, vol. 26, No. 6, Dec. 2004, pp. 657-660.

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