Clock synchronous semiconductor memory device having current con

Details Clock synchronous semiconductor memory device having current con Clock synchronous semiconductor memory device having current con

1996-03-15

1997-09-09

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

3652335, G11C 800

Patent

active

056663242

ABSTRACT:
A synchronous semiconductor memory device includes a clock pulse generator generating internal first and second clock pulses in synchronization with an external clock signal for application, respectively, to a word line select decoder selecting a row of memory cells, and to a bit line select decoder selecting a column of memory cells, a sense amplifier sensing and amplifying a data of selected memory cell and a write driver writing a data to the selected memory cell. Word line select decoder is enabled when the first clock pulse is active, and bit line select decoder, sense amplifier and write driver are activated when the second clock pulse is active. These circuits are activated only for a necessary minimum period, and current consumption is reduced.

REFERENCES:
patent: 5077693 (1991-12-01), Hardee
patent: 5083296 (1992-01-01), Hara
patent: 5341341 (1994-08-01), Fukuzo
patent: 5384750 (1995-01-01), Lee
patent: 5539693 (1996-07-01), Koshikawa

Affiliated with

Also associated with

Rating

Clock synchronous semiconductor memory device having current con does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock synchronous semiconductor memory device having current con, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock synchronous semiconductor memory device having current con will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-74193