Clock-synchronized read-only memory

Details Clock-synchronized read-only memory Clock-synchronized read-only memory

1998-07-21

2000-06-27

Phan, Trong

Static information storage and retrieval

Addressing

Sync/clocking

G11C 800

Patent

active

060814764

ABSTRACT:
A clock-synchronized read only memory includes: a memory cell and a mode register for setting an operation mode, the clock-synchronized read only memory outputting data stored in the memory cell in the operation mode set in the mode register and in synchronization with a clock signal. The contents of the mode register are set when the data is written to the memory cell, the contents defining the operation mode.

REFERENCES:
patent: 5278786 (1994-01-01), Kawauchi et al.
patent: 5381366 (1995-01-01), Kawauchi et al.
patent: 5386385 (1995-01-01), Stephens, Jr.
patent: 5448528 (1995-09-01), Nagai
patent: 5539696 (1996-07-01), Patel
patent: 5568427 (1996-10-01), Takemae
patent: 5751656 (1998-05-01), Schaefer
patent: 5781468 (1998-07-01), Matsuo et al.
patent: 5793665 (1998-08-01), Kim et al.
patent: 5812491 (1998-09-01), Shinozaki et al.
patent: 5831932 (1998-11-01), Merrit et al.
patent: 5835445 (1998-11-01), Nakamura
patent: 5841731 (1998-11-01), Shinozaki

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