Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2005-03-15
2005-03-15
Tran, M. (Department: 2818)
Static information storage and retrieval
Floating gate
Multiple values
C365S185180
Reexamination Certificate
active
06868006
ABSTRACT:
A nonvolatile memory apparatus including a control circuit, plural terminals including clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receives a first clock signal and commands including read and program commands. The clock generator generates a second clock signal. In response to the read command, the control circuit controls reading data from the memory cells, and outputting data via the other terminal not the command terminal in response to the first clock signal. In response to the program command, the control circuit controls receiving data via the other terminal not the command terminal in response to the first clock signal, and writing data to the memory cells. The data writing to ones of said nonvolatile memory cells is performed using the second clock signal.
REFERENCES:
patent: 4435786 (1984-03-01), Tickle
patent: 4692886 (1987-09-01), Miki et al.
patent: 4860258 (1989-08-01), Fruhauf et al.
patent: 4964079 (1990-10-01), Devin
patent: 5059554 (1991-10-01), Spinner et al.
patent: 5084417 (1992-01-01), Joshi et al.
patent: 5138576 (1992-08-01), Madurawe
patent: 5151387 (1992-09-01), Brady et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5200920 (1993-04-01), Norman et al.
patent: 5297029 (1994-03-01), Nakai et al.
patent: 5327390 (1994-07-01), Takasugi
patent: 5365486 (1994-11-01), Schreck
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5422858 (1995-06-01), Mizukami et al.
patent: 5440505 (1995-08-01), Fazio et al.
patent: 5450363 (1995-09-01), Christopherson
patent: 5473570 (1995-12-01), Sato et al.
patent: 5487036 (1996-01-01), Akaogi et al.
patent: 5539688 (1996-07-01), Yiu et al.
patent: 5544099 (1996-08-01), Hara
patent: 5555204 (1996-09-01), Endoh et al.
patent: 5566125 (1996-10-01), Fazio et al.
patent: 5615153 (1997-03-01), Yiu et al.
patent: 5675537 (1997-10-01), Bill et al.
patent: 5677868 (1997-10-01), Takahashi et al.
patent: 5677869 (1997-10-01), Fazio et al.
patent: 5687114 (1997-11-01), Khan
patent: 5694357 (1997-12-01), Mori
patent: 5745409 (1998-04-01), Wong et al.
patent: 5748533 (1998-05-01), Dunlap et al.
patent: 5754469 (1998-05-01), Hung et al.
patent: 5754475 (1998-05-01), Bill et al.
patent: 5757699 (1998-05-01), Takeshima et al.
patent: 5768188 (1998-06-01), Park et al.
patent: 5768191 (1998-06-01), Choi et al.
patent: 5768193 (1998-06-01), Lee et al.
patent: 5796652 (1998-08-01), Takeshima et al.
patent: 5831900 (1998-11-01), Miyamoto
patent: 5915105 (1999-06-01), Farmwald et al.
patent: 6011880 (2000-01-01), Tani et al.
patent: 6038165 (2000-03-01), Miwa
patent: 6044031 (2000-03-01), Iadanza et al.
patent: 6366495 (2002-04-01), Miwa et al.
patent: 6459614 (2002-10-01), Miwa et al.
patent: 0123842 (1979-09-01), None
patent: 59121696 (1984-07-01), None
patent: 626493 (1987-02-01), None
patent: 6234398 (1987-02-01), None
patent: 62257699 (1987-11-01), None
patent: 62298999 (1987-12-01), None
patent: 63276791 (1988-11-01), None
patent: 1134793 (1989-05-01), None
patent: 1273294 (1989-11-01), None
patent: 0215497 (1990-02-01), None
patent: 240198 (1990-02-01), None
patent: 2040198 (1990-02-01), None
patent: 2260298 (1990-10-01), None
patent: 3237692 (1991-10-01), None
patent: 457294 (1992-02-01), None
patent: 4184794 (1992-07-01), None
patent: 4238196 (1992-08-01), None
patent: 5210991 (1993-08-01), None
patent: 06076586 (1994-03-01), None
patent: 06131881 (1994-05-01), None
patent: 06195987 (1994-07-01), None
patent: 6251591 (1994-09-01), None
patent: 06267285 (1994-09-01), None
patent: 06282992 (1994-10-01), None
patent: 06309890 (1994-11-01), None
patent: 07057484 (1995-03-01), None
patent: 793979 (1995-04-01), None
patent: 07161852 (1995-06-01), None
Digest of Technical Papers, ATP 2.1: A 3.3/V 128Mb Multi-level NAND Flash Memory for Mass Storage Applications, T. Jung, et al., ISSCC96/Session 2/Flash Memory/Paper TP 2.1, 1996 EEE International Solid State Circuits Conf.
Betty Prince, “Semiconductor Memories”, 1983, Wisely, 2ndEdition, pp. 620-621.
Kotani Hiroaki
Miwa Hitoshi
Antonelli Terry Stout & Kraus LLP
Renesas Technology Corp.
Tran M.
LandOfFree
Clock synchronized non-volatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Clock synchronized non-volatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock synchronized non-volatile memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3440191