Clock synchronized non-volatile memory device

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S184000

Reexamination Certificate

active

06898118

ABSTRACT:
A nonvolatile memory apparatus which includes a control circuit, plural terminals including a clock, command and other terminals, a converter circuit, and plural of nonvolatile memory cells. The clock terminal receives a clock signal, the command terminal receives commands including a read and program commands, and the control circuit reads out operation steps from a program memory to be executed to control an operation of the received command. In an operation in response to the read command, the control circuit controls reading data in parallel from ones of the nonvolatile memory cells, converting parallel type data to serial type data by the converter circuit, and serially outputting data via the other terminal except the command terminal in response to the clock signal. In an operation in response to the program, the control circuit controls serially receiving data via the other terminal except the command terminal in response to the clock signal, converting serial type data to parallel type data by the converter circuit, and writing data in parallel to ones of the nonvolatile memory cells.

REFERENCES:
patent: 4435786 (1984-03-01), Tickle
patent: 4860258 (1989-08-01), Fruhauf et al.
patent: 4964079 (1990-10-01), Devin
patent: 5059554 (1991-10-01), Spinner et al.
patent: 5084417 (1992-01-01), Joshi et al.
patent: 5138576 (1992-08-01), Madurawe
patent: 5151387 (1992-09-01), Brady et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5200920 (1993-04-01), Norman et al.
patent: 5327390 (1994-07-01), Takasugi
patent: 5365486 (1994-11-01), Schreck
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5440505 (1995-08-01), Fazio et al.
patent: 5450363 (1995-09-01), Christopherson et al.
patent: 5473570 (1995-12-01), Sato et al.
patent: 5487036 (1996-01-01), Akaogi et al.
patent: 5539688 (1996-07-01), Yiu et al.
patent: 5544099 (1996-08-01), Hara
patent: 5555204 (1996-09-01), Endoh et al.
patent: 5566125 (1996-10-01), Fazio
patent: 5615153 (1997-03-01), Yiu et al.
patent: 5675537 (1997-10-01), Bill et al.
patent: 5677868 (1997-10-01), Takahashi et al.
patent: 5677869 (1997-10-01), Fazio et al.
patent: 5687114 (1997-11-01), Khan
patent: 5694357 (1997-12-01), Mori
patent: 5745409 (1998-04-01), Wong et al.
patent: 5748533 (1998-05-01), Dunlap et al.
patent: 5754469 (1998-05-01), Hung et al.
patent: 5754475 (1998-05-01), Bill et al.
patent: 5757699 (1998-05-01), Takeshima et al.
patent: 5768188 (1998-06-01), Park et al.
patent: 5768191 (1998-06-01), Choi et al.
patent: 5768193 (1998-06-01), Lee et al.
patent: 5796652 (1998-08-01), Takeshima et al.
patent: 5831900 (1998-11-01), Miyamoto
patent: 5915105 (1999-06-01), Farmwald et al.
patent: 6011880 (2000-01-01), Tani et al.
patent: 6038165 (2000-03-01), Miwa
patent: 6044031 (2000-03-01), Iadanza et al.
patent: 6343041 (2002-01-01), Kanazashi
patent: 6366495 (2002-04-01), Miwa et al.
patent: 6459614 (2002-10-01), Miwa et al.
patent: 6577530 (2003-06-01), Muranaka et al.
patent: 0123842 (1979-09-01), None
patent: 59121696 (1984-07-01), None
patent: 626493 (1987-02-01), None
patent: 6234398 (1987-02-01), None
patent: 62257699 (1987-11-01), None
patent: 62298999 (1987-12-01), None
patent: 63276791 (1988-11-01), None
patent: 1134793 (1989-05-01), None
patent: 1273294 (1989-11-01), None
patent: 240198 (1990-02-01), None
patent: 2040198 (1990-02-01), None
patent: 2260298 (1990-10-01), None
patent: 3237692 (1991-10-01), None
patent: 457294 (1992-02-01), None
patent: 4184794 (1992-07-01), None
patent: 4238196 (1992-08-01), None
patent: 06076586 (1994-03-01), None
patent: 06131881 (1994-05-01), None
patent: 06195987 (1994-07-01), None
patent: 5210991 (1994-09-01), None
patent: 6251591 (1994-09-01), None
patent: 06267285 (1994-09-01), None
patent: 06282992 (1994-10-01), None
patent: 06309890 (1994-11-01), None
patent: 07057484 (1995-03-01), None
patent: 793979 (1995-04-01), None
patent: 07161852 (1995-06-01), None
patent: 0215497 (2000-08-01), None
Digest of Technical Papers, ATP 2.1: A 3.3V 128Mb Multi-level NAND Flash Memory for Mass Storage Applications, T. Jung, et al., ISSCC96/Session 2/Flash Memory/Paper TP 2.1, 1996 EEE International Solid State Circuits Conf.
Betty Prince, “Semiconductor Memories”, 1983, Wisely, 2ndEdition, pp. 620-621.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Clock synchronized non-volatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock synchronized non-volatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock synchronized non-volatile memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3406091

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.