Clock synchronization system

Details Clock synchronization system Clock synchronization system

1994-10-21

1995-10-17

Tse, Young

Pulse or digital communications

Synchronizers

327141, 326 93, H04L 702

Patent

active

054597641

ABSTRACT:
A clock synchronization system is constituted by first and second clock generating sections. The first and second clock generating units are alternately set in current and spare use modes. The apparatus clock from one clock generating section in the current use mode is supplied to an external circuit. In each clock generating section, a state signal generating section receives a first state signal representing one of the modes, and outputs a second state signal representing a set mode opposite to the mode represented by the first state signal to the other clock generating section. A clock generating section generates a clock synchronized with the network sync signal. A frequency-dividing circuit outputs an apparatus clock by frequency-dividing the clock in synchronism with the network sync signal when the first state signal represents the spare unit mode, and outputs an apparatus clock by frequency-dividing the clock in synchronism with a sync pulse from the clock generating section when the first state signal represents the current use mode. A clock control section outputs an apparatus clock from the frequency-dividing circuit as a supply clock only when the second state signal represents the current use mode. A sync pulse generating circuit generates a sync pulse which is advances by a predetermined time.

REFERENCES:
patent: 4847867 (1989-07-01), Masu et al.
patent: 4964141 (1990-10-01), Matsushima et al.

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