Clock switching circuit and method for preventing glitch during

Details Clock switching circuit and method for preventing glitch during Clock switching circuit and method for preventing glitch during

1991-04-12

1992-10-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307265, 307480, 328 58, 328 63, H03K 513, H03K 1902

Patent

active

051553805

ABSTRACT:
A clock switching circuit comprises a multiplexer, a gate, a first detector, a second detector and a state machine. The multiplexer receives two clock signals and outputs one of them through the gate. The first detector is coupled to the output of the multiplexer and the second detector is coupled to the output of the gate. The state machine controls the output of the gate and the multiplexer in response to signals from the first and second detector, and prevent glitches from being output by the gate.

REFERENCES:
patent: 4970418 (1990-11-01), Masterson

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