Clock-supply control system of digital-signal processors

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G06F 110

Patent

active

058705953

ABSTRACT:
A clock-supply control system has an AND circuit whereby, when a transfer halt signal and a processing completion signal output by a DSP as well as a transfer halt signal output by a data output unit are all activated, the supply of a clock signal to the DSP is cut off.

REFERENCES:
patent: 5021950 (1991-06-01), Nishikawa
patent: 5452434 (1995-09-01), MacDonald
patent: 5546568 (1996-08-01), Bland et al.
patent: 5754883 (1998-05-01), Lim et al.
patent: 5765003 (1998-06-01), MacDonald et al.

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