Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Frequency of cyclic current or voltage
Reexamination Certificate
2001-10-25
2004-05-18
Deb, Anjan K. (Department: 2858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
Frequency of cyclic current or voltage
C324S073100, C702S079000, C714S700000
Reexamination Certificate
active
06737852
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a clock skew measuring apparatus and a clock skew measuring method for measuring skews between a plurality of on-chip clock signals obtained by distribution by a clock distribution circuit on a semiconductor integrated circuit chip.
2. Description of the Related Art
According to conventional techniques, an on-chip clock skew is statistically estimated by bringing out clock signals to be measured into the outside of a chip at the same time, as shown in
FIG. 1
, using a time interval analyzer or frequency counter. The time interval analyzer measures a timing difference of a zero-crossing point between the clock signal to be measured and a reference clock signal so as to measure fluctuation thereof in accordance with histogram analysis. An exemplary clock skew measuring technique using the time interval analyzer is disclosed in Wavecrest Corp., Jitter Analysis Clock Solutions, 1998, for example.
The conventional clock skew measuring method, however, requires a plurality of high-frequency clock output pins that may increase a cost of the apparatus, in order to simultaneously bring out a plurality of clock signals to be measured to the outside of the chip, thereby increasing the cost of the measurement. Moreover, the number of pins of the chip is limited. Thus, in a large-scale semiconductor integrated circuit, the skew measurement is possible only for a very small number of the distributed clocks, so that the clock skew for the entire circuit cannot be obtained precisely. Therefore, a new clock skew measuring method is required in order to enable the high-precision control of the skews between the on-chip clock signals.
It is an object of the present invention to provide a clock skew measuring apparatus and a clock skew measuring method which can efficiently estimate the skews between the on-chip clock signals.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide clock skew measuring apparatus and method which overcomes the above issues in the related art. This object is achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.
According to the first aspect of the present invention, a clock skew measuring apparatus for measuring a clock skew between a plurality of clock signals to be measured in a device under test, comprises: a clock signal selecting element operable to receive the plurality of clock signals to be measured and to output the plurality of clock signals to be measured by selecting one of the plurality of clock signals to be measured one by one; and a clock skew estimator operable to receive a reference signal input to the device under test and the plurality of clock signals to be measured output from the clock signal selecting element and to obtain the clock skew estimates between the plurality of clock signals to be measured by measuring a timing difference between the received reference signal and each of the plurality of clock signals to be measured.
The clock skew measuring apparatus may further comprise: a plurality of buffers operable to respectively supply the plurality of clock signals to be measured to the clock signal selecting element; and a controller operable to control whether or not each of the plurality of buffers supplies a corresponding one of the plurality of clock signals to be measured to the clock signal selecting element.
The clock skew estimator may measure a deterministic component of the clock skew between the plurality of clock signals to be measured.
The clock skew estimator may measure a random component of the clock skew between the plurality of clock signals to be measured.
The clock skew estimator may include: a timing estimator operable to obtain a reference timing that is an edge timing of the reference signal and a tested timing that is an edge timing of each of the plurality of clock signals to be measured; a timing error estimator operable to obtain the timing difference between the tested timing and the reference timing; and a clock skew calculator operable to obtain the clock skew estimates between the plurality of clock signals to be measured from the timing difference obtained for each of the plurality of clock signals to be measured.
The clock skew estimator may further include a corrector operable to correct the clock skew obtained by the clock skew calculator.
The timing estimator may obtain a rising edge timing or a falling edge timing of each of the reference signal and the plurality of clock signals to be measured.
The timing estimator may include: an analytic signal transformer operable to transform each of the plurality of clock signals to be measured into a complex analytic signal; an instantaneous phase estimator operable to obtain an instantaneous phase of the analytic signal; a linear instantaneous phase estimator operable to obtain a linear instantaneous phase of each of the plurality of clock signals to be measured based on the instantaneous phase obtained; and an initial phase estimator operable to obtain an ideal edge timing of each of the plurality of clock signals to be measured by obtaining an initial phase angle of the linear instantaneous phase.
The timing estimator may further include: a linear trend remover operable to remove the linear instantaneous phase from the instantaneous phase to obtain an instantaneous phase noise; and a zero-crossing resampler operable to re-sample only data of the instantaneous phase noise around zero-crossing timings of a real part of the analytic signal and to output a timing jitter sequence of each of the plurality of clock signals to be measured.
The analytic signal transformer may include: a band-pass filter operable to receive each of the plurality of clock signals and to extract from the received clock signal frequency components around a fundamental frequency of the received clock signal thereby outputting a band-limited signal; and a Hilbert transformer operable to perform Hilbert transformation for the band-limited signal to generate Hilbert transform pairs of the clock signal to be measured.
The analytic signal transformer may include: a time-domain to frequency-domain transformer operable to receive each of the clock signals to be measured and to transform the received clock signal into two-sided spectra in a frequency domain; a bandwidth limiter operable to extract from the two-sided spectra frequency components around a positive fundamental frequency thereof; and a frequency-domain to time-domain transformer operable to inversely transform an output of the bandwidth limiter into a time-domain signal.
The analytic signal transformer may include: a buffer memory, to which each of the plurality of clock signals to be measured is supplied, operable to store the supplied clock signal; an extracting portion operable to select and extract a section of the stored clock signal in such a manner that a section presently extracted partially overlaps a section previously extracted; a window function multiplier operable to multiply the extracted section by a window function; a transforming portion operable to transform the multiplied section into two-sided spectra in a frequency domain; a bandwidth limiter operable to extract, from the two-sided spectra transformed in the frequency domain, frequency components around a positive fundamental frequency of the supplied clock signal to be measured; an inverse transformer operable to inversely transforming an output of the bandwidth limiter into a time-domain signal; and an inverse window function multiplier operable to multiply the time-domain signal by an inverse of the window function to obtain the analytic signal that has been band-limited.
The clock skew estimator may include an analog-to-digital converter operable to receive the reference signal and each of the clock signals to be measured and to digitize the reference signal and each of the clock signals to be measured.
The clock skew estimator may
Ishida Masahiro
Soma Mani
Yamaguchi Takahiro
Advantest Corporation
Deb Anjan K.
Osha Novak & May L.L.P.
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