Clock signal resynchronizing apparatus

Details Clock signal resynchronizing apparatus Clock signal resynchronizing apparatus

1989-10-23

1991-02-26

Olms, Douglas W.

Pulse or digital communications

Spread spectrum

Direct sequence

375112, 3701053, H04L 7033, H04L 710

Patent

active

049966987

ABSTRACT:
When synchronous communication systems such as SONET (synchronous optical network) need to change data formats, the resulting periodically discontinuous clock signal associated with the data after overhead has been removed, has to be smoothed to a periodically continuous clock signal associated with resynchronized output data. The SONET format employs pointers which may be described as large phase hit error signals relative the clock signal. The present invention illustrates a technique for slowly integrating the large phase hit error signals into the clock smoothing process so that jitter in the smoothed clock output is held below previously obtainable limits. This is accomplished by high-pass filtering the large phase hit signal and summing it with the periodically discontinuous clock before applying it to a second order type 2 low-pass filter system which filter system employs phase locked loop synchronizing techniques. This total process operates as a low-pass filter to the large phase hits in the clock signal being resynchronized.

REFERENCES:
patent: 3420956 (1969-01-01), Heightley et al.
patent: 4716575 (1987-12-01), Douros et al.

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