Clock signal generator using fractional frequency division and c

Pulse or digital communications – Spread spectrum – Direct sequence

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377 48, 377 50, 377 51, H04L 700

Patent

active

052672735

ABSTRACT:
A clock signal generator using fractional frequency division is provided comprising a division circuit that produces a clock signal starting from a timing rhythm signal. The frequencies of the two signals are in a division ratio which is the sum of a whole part and a fractional part. A pulse subtractor is provided for receiving the rhythm signal and transmitting it to the division circuit while deleting at least one pulse from this signal upon a command. An accumulator commands a pulse subtractor on each occasion when the product of the number of pulses of the clock signal counted, starting from a time of origin and of the fractional part, changes by unity.

REFERENCES:
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patent: 4555793 (1985-11-01), Benamy
patent: 4658406 (1987-04-01), Pappas
patent: 4712224 (1987-12-01), Nelson
patent: 4914680 (1990-04-01), Tanns et al.
patent: 4991187 (1991-02-01), Herold et al.
patent: 4996699 (1991-02-01), Rudolph

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