Clock signal generator providing non-integer frequency multiplic

Details Clock signal generator providing non-integer frequency multiplic Clock signal generator providing non-integer frequency multiplic

1996-05-29

1998-08-04

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327113, 327114, 327122, 327170, 377 48, 331 57, H02M 540, H03K 378

Patent

active

057899533

ABSTRACT:
A clock signal generator or frequency multiplier generates an output signal having a frequency which is a non-integer multiple of an input signal frequency. One clock signal generator contains one or more shift registers. A signal generated from a logical combination of bits from the shift registers transitions from high to low or low to high as values in the shift registers shift. The transitions have a pattern which repeats each time values in the shift registers return to their initial states and the initial states stored in the shift registers control the number of transitions per repetition. The frequency of the combined signal is the frequency of the input signal times the ratio of the number of transitions per repetition to the number of shifts per repetition. One embodiment of the invention provides a 1.33x multiple of an input clock signal. Using a 1.33x multiple of a nominally highest frequency input clock signal from a set of input clock signals provides an output clock signal having a frequency greater than any input clock signal in the set even if the frequencies of the input clock signals vary from their nominal frequencies by up to 10%.

REFERENCES:
patent: 3922593 (1975-11-01), McGuffin et al.
patent: 5325487 (1994-06-01), Au et al.
patent: 5644259 (1997-07-01), Shishikura et al.
S. Roach, "Digital High Frequnecy Doubler Circuit," IBM Technical Disclosure Bulletin, vol. 25, No. 3A, Aug. 1982, pp. 1146-1147.

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