Clock signal generator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – Having selection between plural continuous waveforms

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Details

327298, 327115, 327116, 327117, 377 47, H03B 1900

Patent

active

056844182

ABSTRACT:
A clock signal generator can prevent unnecessary power consumption and can lower the power consumption of a system or a chip as a whole. A clock generator has a plurality of multipliers having variable multiplying factors and multiplying a single input reference clock signal by a designated multiplying factor. A plurality of frequency dividers have variable divide factors and divide a clock signal by a designated dividing factor. A clock selector selects a clock signal which has a required frequency according to a status signal STS from each of the functional locks from among the clock signals having a plurality of frequencies generated by the clock generator. The clock selectors stops the operation of the multipliers or the frequency dividers which are generating unused frequencies by switching clock signals.

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patent: 5142247 (1992-08-01), Lada, Jr. et al.
patent: 5389826 (1995-02-01), Sonobe
"Generation of Square waves from programmable frequency divider" by Atis D. Mitra, Electronics, vol. 49, No.4, pp. 343-344, Oct. 1980.

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