Clock signal generator

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Phase shift by less than period of input

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327175, 327250, H03H 1116

Patent

active

059864915

ABSTRACT:
The clock signal generator can be used to generate a first and/or a second output clock signal from an input clock signal. The rising and/or falling edges of the input clock signal are shifted using delay stages. The clock signal generator has a delay stage with a plurality of delay elements that are wired up in parallel and that have different delay lengths, and a selection device that is used to determine which of the output signals from the delay elements is to be output as the output signal of the delay stage.

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Japanese Patent Abstract No. 03204222 (Chiori et al.), dated Sep. 5, 1991.
Japanese Patent Abstract No. 01068016 (Masaru et al.), dated Mar. 14, 1989.
Japanese Patent Abstract No. 0212427 (Chiori), dated May 11, 1990.

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