Clock signal generator

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307269, 307303, 307443, 307491, H03K 19003, H03K 1908

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active

048663107

ABSTRACT:
The clock signal generator for generating non-overlapping polyphase clock pulses having no overlapping period of time where the clock pulses have a high level at the same time, comprises a clock signal generation control means provided for each of the polyphase clock pulses so that a clock signal on a signal path where the largest delay is caused among at the signal paths of one phase is used to prevent clock signal generation in the other phases.

REFERENCES:
patent: 4417158 (1983-11-01), Ito et al.
patent: 4477738 (1984-10-01), Kouba
patent: 4514647 (1985-04-01), Shoji
B. Cassidy et al, "Dynamic MOSFET Logic Clock Driver", IBM Technical Disclosure Bulletin, vol. 22, No. 3, Aug. 1979, pp. 1093-1094.
N. Heckt, "Two-Phase Clock Features Nonoverlapping Outputs", Electronics, Jan. 20, 1977, p. 99.
"Introduction to VLSI", by Mead and Conway, second printing, Oct. 1980, published by Addison-Wesley Publishing Co., Inc., pp. 229-234.

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