Clock signal generating circuit, display panel module,...

Details Clock signal generating circuit, display panel module,... Clock signal generating circuit, display panel module,...

2011-05-17

2011-05-17

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07944259

ABSTRACT:
A delay synchronization loop type clock signal generating circuit includes: a delay line for delaying a first clock signal by a set delay amount and outputting; a delay time length setting unit for setting a delay time length of the delay line, based on phase difference between a second clock signal output from an output terminal and the first clock signal; a phase relation determining unit for determining whether or not the phase relation of the first clock signal and the second clock signal are in a particular phase relation; and a phase inversion
on-inversion unit for performing phase inversion of the first clock signal on a transmission path including the delay line, at the time of detecting the particular phase relation.

REFERENCES:
patent: 6259754 (2001-07-01), Jeong
patent: 6310498 (2001-10-01), Larsson
patent: 6384867 (2002-05-01), Seino et al.
patent: 6625242 (2003-09-01), Yoo et al.
patent: 6686784 (2004-02-01), Chang
patent: 6690243 (2004-02-01), Henrion
patent: 6809567 (2004-10-01), Kim et al.
patent: 7242733 (2007-07-01), Iwata
patent: 7583117 (2009-09-01), Lin et al.
patent: 2007/0121773 (2007-05-01), Kuan et al.
patent: 2007/0216456 (2007-09-01), Kook et al.
patent: 2007/0247201 (2007-10-01), Lin et al.
patent: 2007/0247202 (2007-10-01), Lin et al.
patent: 2009/0096906 (2009-04-01), Senda et al.
patent: 2010/0052749 (2010-03-01), Rim
patent: 2000-078000 (2000-03-01), None
patent: 2002-100982 (2002-04-01), None
patent: 2003-204261 (2003-07-01), None
patent: 2004-050650 (2004-02-01), None
patent: 2005-020711 (2005-01-01), None
patent: 2005-038557 (2005-02-01), None
patent: 2006-074580 (2006-03-01), None
patent: 2006-287641 (2006-10-01), None
patent: 2007-006517 (2007-01-01), None
Japanese Office Action issued on Dec. 22, 2009 in connection with corresponding JP Application No. 2007-314635.

Affiliated with

Also associated with

Rating

Clock signal generating circuit, display panel module,... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock signal generating circuit, display panel module,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock signal generating circuit, display panel module,... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2674539