Clock signal generating circuit

Details Clock signal generating circuit Clock signal generating circuit

1997-09-26

1999-07-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327166, 331116FE, G06F 104, H03K 300

Patent

active

059232013

ABSTRACT:
A clock signal generating circuit of the present invention switches the threshold value of a buffer circuit included in an output buffer section substantially when the oscillation output of an oscillating section is stabilized, thereby generating a clock signal. The clock signal plays the role of a clock signal for a stabilization detecting circuit at the same time. Therefore, once the oscillation is stabilized, clock components other than a clock signal whose duty cycle is 50% and which would bring about noise are obviated. This allows the clock signal output from the clock signal generating circuit to remain stable.

REFERENCES:
patent: 4039973 (1977-08-01), Yamashiro
patent: 4322694 (1982-03-01), Morihisa
patent: 4746810 (1988-05-01), Takahashi
patent: 4864255 (1989-09-01), Yoshida
patent: 5187453 (1993-02-01), Aoyagi et al.

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