Clock signal generating circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Measuring or testing

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Details

377 44, 328 61, 3281291, G04F 1004

Patent

active

049583620

ABSTRACT:
A circuit for generating clock signals includes a reference clock signal generator and a 1/N frequency divider for generating 1/N frequency divided clock signals. An up-counter counts the 1/N frequency divided clock signals until the occurrence of a first event. A programmable counter receives both an inverted count result as an initial value from the up-counter and the reference clock signals and counts the reference clock signals up to a predetermined count. When the programmable counter reaches the predetermined count it outputs a carry signal and is reset back to the initial value. As the programmable counter again counts from the initial value to the predetermined count, it again outputs a carry signal. These plurality of carry signals can be counted to provide a count corresponding to the amount of time between the occurrence of plurality of events.

REFERENCES:
patent: 3579126 (1971-05-01), Paul
patent: 3657658 (1972-04-01), Kubo
patent: 3936745 (1976-02-01), Harrington
patent: 3952253 (1976-04-01), DeVolpi et al.
patent: 4339722 (1982-07-01), Sydor et al.
patent: 4737942 (1988-04-01), Nishibe et al.

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