Clock signal generating circuit

Details Clock signal generating circuit Clock signal generating circuit

1987-02-06

1988-07-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307582, 307480, 328 63, H03K 19096, H03K 1901

Patent

active

047602813

ABSTRACT:
In a clock signal generating circuit for a semiconductor large scale integrated circuit, the clock signal generating circuit includes: a P-channel transistor and a first N-channel transistor, each connected in series between a positive side power source line and a ground side power source line; a second N-channel transistor connected between a common connection point of the P-channel transistor and the first N-channel transistor and a gate of the first N-channel transistor through a node, and a clock signal is applied to a gate of the second N-channel transistor. A capacitor is connected between the gate of the first N-channel transistor and a gate of the P-channel transistor; and a bootstrap capacitor is connected to the common connection point.

REFERENCES:
patent: 4352996 (1982-10-01), White, Jr.
patent: 4496851 (1985-01-01), Southerland, Jr.
patent: 4496852 (1985-01-01), Blaser et al.
patent: 4521701 (1985-06-01), Reddy
patent: 4542307 (1985-09-01), Baba
patent: 4574203 (1986-03-01), Baba
patent: 4633105 (1986-12-01), Tsujimoto
patent: 4636657 (1987-01-01), Reddy

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