Clock signal generating apparatus

Television – Synchronization

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Details

348537, 348540, H04N 504

Patent

active

055682014

ABSTRACT:
An apparatus for generating a clock signal phase-locked to a sync signal of a video signal. The apparatus comprises an error detector for detecting a phase error between the sync signal of the digitized video signal and a comparison signal produced internally; a clock signal generator whose oscillation frequency is variably controlled in response to the output of the error detector; a counter for counting the output of the clock signal generator; and a circuit for producing the comparison signal in response to the count value of the counter. The phase error is detected by integrating the level data of the digitized video signal, and the output of the error detector is replaced with a fixed value when the comparison signal has a predetermined phase. The apparatus is capable of preventing occurrence of a great phase error even at a head switching time or during the vertical blanking interval, so that mislock is preventable and a pull-in action can be executed fast.

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patent: 5170297 (1992-12-01), Wahler et al.
patent: 5184091 (1993-02-01), Srivasatava
patent: 5214677 (1993-05-01), Mori
patent: 5259007 (1993-11-01), Yamamoto
patent: 5278702 (1994-01-01), Wilson et al.
patent: 5414741 (1995-05-01), Johnson

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