Clock signal extraction system for high density recording appara

Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal gain processing

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369 60, 369 48, 360 51, 331 17, G11B 2014

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active

059205334

ABSTRACT:
The invention provides a clock signal extraction circuit which can extract a synchronizing clock signal accurately from a readout waveform reproduced from information recorded in a high density and which includes substantial intersymbol interferences. An analog readout signal is converted into binary information with a synchronizing clock signal from a voltage controlled oscillator. A replica signal is produced from the binary information by a waveform replica production circuit while time corrected readout waveform data are produced from the analog readout signal by a delay circuit, and a phase amount is detected from the time corrected readout waveform data and the replica signal by a phase amount detection circuit. The base amount is used to control the voltage controlled oscillator, thereby forming a phase locked loop to perform a follow-up operation to the readout signal.

REFERENCES:
patent: 4736238 (1988-04-01), Moriyama et al.
patent: 4945538 (1990-07-01), Patel
patent: 5363352 (1994-11-01), Tobita et al.
patent: 5432820 (1995-07-01), Sugawara et al.

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