Clock signal extracting circuit

Pulse or digital communications – Spread spectrum – Direct sequence

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375 12, 375 81, 329122, H04L 704

Patent

active

044358253

ABSTRACT:
A clock extractor is disclosed in which an input data signal is sampled and held in accordance with a sampling frequency, the input data signal thus processed is subjected to equalization and amplification, a difference in voltage (namely, height) is detected between those portions of a waveform obtained after the equalization and amplification which appear before and after a time when the waveform has a maximum voltage amplitude, a phase of that portion of the waveform which has the maximum voltage amplitude, is determined by making the above-mentioned difference equal to zero, and a clock signal synchronized with the portion having the maximum voltage amplitude is extracted and reproduced from the input data signal.

REFERENCES:
patent: 3557308 (1971-01-01), Alexander
patent: 3701948 (1972-10-01), McAuliffe
patent: 3943448 (1976-03-01), Motley et al.
patent: 4312075 (1982-01-01), Murano et al.

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