Clock signal duty cycle correction circuit and method

Details Clock signal duty cycle correction circuit and method Clock signal duty cycle correction circuit and method

1996-03-12

1998-05-26

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

327172, H03K 3017

Patent

active

057572186

ABSTRACT:
A duty cycle correction circuit that facilitates correction of clock signal duty cycles, including correcting for errors introduced by intervening devices in the clock signal distribution network. The duty cycle correction circuit of the preferred embodiment comprises a clock chopper circuit, a duty cycle comparator circuit, and a control circuit. The duty cycle comparator circuit compares the duty cycle of the clock signal with the duty cycle of a reference signal. The control circuit adjusts the clock chopper circuit based upon the duty cycle comparison, resulting in an output with a corrected duty cycle.

REFERENCES:
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patent: 4799022 (1989-01-01), Skierszkan
patent: 5118975 (1992-06-01), Hillis et al.
patent: 5347232 (1994-09-01), Nishimichi
Bechade, R. A. and Houle, R. M., "Digital delay line clock shapers and multipliers",IB M J. Res. Develop., vol. 39, No. 1/2, Jan./Mar. 1995, pp. 93-103.

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