Clock signal amplifying method and driving stage for LCD...

Details Clock signal amplifying method and driving stage for LCD... Clock signal amplifying method and driving stage for LCD...

2007-11-06

2007-11-06

Nguyen, Jimmy H. (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S099000

Reexamination Certificate

active

10708178

ABSTRACT:
A clock signal amplifying method and driving stage for LCD driving circuit is provided. The driving stage includes a clock input, a level shifter, and an output buffer. Firstly, the clock input receives a cock signal oscillating between a high original level and a low original level. Thereafter, a level shifter is biased at a high target level and a low target level, and amplifies the clock signal to a relay signal, which oscillates between a high relay level and a low relay level. Lastly, the output buffer is biased at the high relay level and the low relay level for amplifying the relay signal to a target signal, which oscillates between the high target level and the low target level.

REFERENCES:
patent: 5646642 (1997-07-01), Maekawa et al.
patent: 6300927 (2001-10-01), Kubota et al.
patent: 6392628 (2002-05-01), Yamazaki et al.

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